Philip Freidin was an architect of RISC (AM29000) and Bit-Slice (AM2900/29300) while at AMD. Later, while at Xilinx, he architected FPGAs such as the XC4000, Virtex, Virtex2, Virtex4 and the Spartan. He also has various patents, including for synchronous dual port RAM on an FPGA and for a programming standard that was the precursor to JTAG. Now he is a design consultant (and has been for the past 17 years) working on a variety of products. Much like some of our other guests, he’s also a hobbyist and has a garage full of metal working equipment for machining and building whatever he can dream up.
So…what kinds of questions do you have for him? Please ask a question or two on the Discuss Server!
John says
My question is: what’s his opinion of the future of programmable logic with respect to hobbyists. Can we expect to see fully open-source, easy-to-use toolchains, and inexpensive programming tools and dev boards? Do any manufacturers seem to be embracing this trend more than others?
Evan says
What changes do you think will happen in coming years to verilog/vhdl?
Johan says
Since the discuss server went down just after i posted a question, i’ll post it here aswell.
Can you tell me something about power decoupling in the fpga die? Is it done with discrete capacitors or plane capacitance?