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#503 – Fabless Chip Design with Mohamed Kassem

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Welcome Mohammed Kassem, CTO of eFabless!

  • This is well timed after we talked with Tim Ansell in episode 501 on about Google’s announcement around the open source PDK.
  • OpenLANE was mentioned in that episode, but that is run by eFabless
  • Traditionally, the semi industry had been very closed. Small companies struggled to get a custom chip made, and it was still $500K to $1M to start.
  • When efabless started, they wanted to design in the browser
  • Was the open PDK the gating moment?
  • The PDK is the IP of the fab. eFabless uses the 130 nm PDK from Global Foundries, 80 nm from Sky Fab (which are not open).
  • Does it have to be on the browser? No, but that made it easier to deal with closed source IP.
  • Lots of people are working on it around the world, even at highGer latencies
  • Black box design / only knowing the input and output
  • eFabless offers both open and closed IP
  • Mohammed worked in smartphone chip development, starting in 2000. He designed chips for smartphones at TI. He saw that there can be as few as two people designing chips at a company, but the rest of the company is designing infrastructure that makes it possible. What if this infrastructure was outside of any one company?
  • He asked if it can look like an app store, since there would be small players who could access the resources and develop small ideas.
  • Was this a validated idea? Do engineers want this sort of thing?
  • Looked at Topcoder as an example from the software world. There were also data points from the open source world.
  • What is the volume for making a custom chip?
  • The first chip off the line costs the entire NRE. Each additional chip amortizes that up front cost. Need to sell enough to cover the NRE cost with the margin in the chip.
  • eFabless want to reduce the volume requirement so it’s less of a hassle when someone is asking “Do I need an ASIC?”
  • That knowledge is residing on the IC side, so a system dev wouldn’t consider doing it
  • Reasons for using an ASIC (after getting the costs down)
    • Size
    • Configurability
    • Security
    • Supply chain reliability
    • Obsolescence mitigation
    • Using the IP to pitch a startup idea to investors
  • Raven microcontroller uses the RISC V core by Claire Wolf. Raven isn’t all open source (all the way down to the transistors), but a lot of it is.
  • Can clone an ARM chip on the platform, without needing to do much design. Anything with closed IP has to stay online.
  • With the openPDK, there is striVe SOC family. It has no analog on it at all.
  • Adding memory is like an FPGA using block ram
  • Mohammed will be doing a FOSSI dialup talk on Aug 25th
  • OpenROAD vs OpenLANE
  • OpenROAD can do 1M+ gates, previously was only 100K
  • GDS is “graphic design system”. It is like gerbers all in one file, but also has thickness information.
  • Xfab – 350 nm for high voltage, 180 nm for normal
  • Global Foundries 130G, can do front end with it
  • What does it take to get a new fab onto their platform?
  • GDS is readable in any tool, but it’s not as easy as it might be with large scale EDA
  • Start with design rules, which are in a PDF manual
  • Validating the designs and design rules is done against known designs. The number of layouts will go up a lot with the open source PDK, which is why getting more designs is important! This will allow people to push the rules
  • Analog process always trails digital
  • Hopefully this is all the beginning, with Skywater as a beachhead for convincing other fabs to open up.
  • Statistically speaking, more designs means more potential hits in the marketplace (for Skywater)
  • It’s like a currency: convert IP to a process technology is valuable, but doesn’t translate well to other places.
  • Parallel processing might be possible now that there are more people testing
  • Join the slack channel
  • The process requires a lot of knowledge, but wants to simplify the knowledge level
  • Try out your very own Raven configuration! Chris was able to do it with a few clicks during the recording.
  • The goal with OpenLANE is to get to no design rule errors
  • NEC wanted to work with Raven on parts and ended up customizing past the configuration tool online.
  • Learn more at eFabless.com
  • Join the Slack Channel to talk with others and get involved! invite.skywater.tools or join.skywater.tools

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