<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Scott Hanson on The Amp Hour</title><link>https://theamphour.com/guests/scott-hanson/</link><description>Recent content in Scott Hanson on The Amp Hour</description><generator>Hugo</generator><language>en-us</language><lastBuildDate>Tue, 10 Nov 2026 16:30:00 +0000</lastBuildDate><atom:link href="https://theamphour.com/guests/scott-hanson/index.xml" rel="self" type="application/rss+xml"/><item><title>Subthreshold Innovation at Ambiq with Scott Hanson</title><link>https://theamphour.com/738-subthreshold-innovation-at-ambiq-with-scott-hanson/</link><pubDate>Tue, 10 Nov 2026 16:30:00 +0000</pubDate><guid>https://theamphour.com/738-subthreshold-innovation-at-ambiq-with-scott-hanson/</guid><description>&lt;p&gt;&lt;a href="https://www.linkedin.com/in/scott-hanson-82707b7/"&gt;Scott Hanson&lt;/a&gt; is founder and CTO of &lt;a href="https://ambiq.com/"&gt;Ambiq&lt;/a&gt;, a pioneer in ultra-low-power semiconductor design based in Austin, Texas. He joins Chris to discuss tech transfer from his PhD research at the &lt;a href="https://umich.edu/"&gt;University of Michigan&lt;/a&gt;, sub-threshold and near-threshold transistor operation, building relationships with foundries like &lt;a href="https://www.tsmc.com/"&gt;TSMC&lt;/a&gt;, and how Ambiq is leveraging edge AI, neural codecs, and scalable hardware architectures to redefine energy efficiency in embedded electronics.&lt;/p&gt;
&lt;h3 id="timeline"&gt;Timeline&lt;/h3&gt;
&lt;ul&gt;
&lt;li&gt;Chris welcomes &lt;a href="https://www.linkedin.com/in/scott-hanson-82707b7/"&gt;Scott Hanson&lt;/a&gt;, founder and CTO of &lt;a href="https://ambiq.com/"&gt;Ambiq&lt;/a&gt;, to discuss low-power microcontroller design and the origins of Ambiq from his PhD research at the &lt;a href="https://umich.edu/"&gt;University of Michigan&lt;/a&gt;. (00:00:15)&lt;/li&gt;
&lt;li&gt;Scott describes the mid-2000s research into &amp;ldquo;&lt;a href="https://en.wikipedia.org/wiki/Smartdust"&gt;smart dust&lt;/a&gt;&amp;rdquo;_building cubic-millimeter computers with integrated sensors, microcontrollers, radios, and batteries operating under nanowatt and picojoule energy constraints. (00:00:45)&lt;/li&gt;
&lt;li&gt;Chris and Scott discuss &lt;a href="https://theamphour.com/topics/dust-networks/"&gt;Dust Networks&lt;/a&gt; (spun out of UC Berkeley and later acquired by Linear Technology) and trace sub-threshold and near-threshold circuit roots back to 1970s wristwatch development. (00:01:45)&lt;/li&gt;
&lt;li&gt;Scott explains how sub-threshold design runs transistors at voltages far below standard textbook levels, serving as the foundational precursor to modern IOT and &lt;a href="https://theamphour.com/topics/ai/"&gt;edge AI&lt;/a&gt;. (00:02:45)&lt;/li&gt;
&lt;li&gt;Scott contrasts university cleanroom fabbing at Michigan—where rapid shuttle runs with foundries like &lt;a href="https://www.ibm.com/"&gt;IBM&lt;/a&gt; and &lt;a href="https://www.tsmc.com/"&gt;TSMC&lt;/a&gt; prioritize room-temperature prototypes—against commercial volume manufacturing. (00:03:30)&lt;/li&gt;
&lt;li&gt;Chris recalls the &lt;a href="https://en.wikipedia.org/wiki/Microelectromechanical_systems"&gt;MEMS&lt;/a&gt; facility at &lt;a href="https://case.edu/"&gt;Case Western Reserve University&lt;/a&gt;, noting how process node geometry scaling naturally drops operation and threshold voltages. (00:04:45)&lt;/li&gt;
&lt;li&gt;Scott breaks down how &lt;a href="https://en.wikipedia.org/wiki/FinFET"&gt;FinFET&lt;/a&gt; transistors provided a step-function improvement with near-ideal sub-threshold slope, allowing lower threshold and supply voltage operation despite voltage scaling saturation at advanced nodes. (00:06:00)&lt;/li&gt;
&lt;li&gt;Scott shares research results from Michigan showing experimental sub-threshold circuits operation down to 0.1V and even 65 mV under ideal laboratory conditions. (00:07:45)&lt;/li&gt;
&lt;li&gt;Scott recounts the pivotal moment riding an elevator when he decided to execute tech transfer from his PhD research into a startup rather than following traditional academic or corporate research paths. (00:08:45)&lt;/li&gt;
&lt;li&gt;Scott describes securing state and federal research grants to fund commercialization while serving a one-year postdoc to determine whether to build medical devices, IP licensing, or standalone chips. (00:10:15)&lt;/li&gt;
&lt;li&gt;Scott recalls starting Ambiq in 2010 during a venture capital low point for semiconductor startups following the 2008 financial crisis and Wi-Fi startup fatigue. (00:12:15)&lt;/li&gt;
&lt;li&gt;Scott reflects on initially pitching processors that would lag Moore&amp;rsquo;s law to save capital, before realizing that competing required keeping pace with advanced process nodes. (00:14:00)&lt;/li&gt;
&lt;li&gt;Scott explains choosing &lt;a href="https://theamphour.com/topics/austin/"&gt;Austin&lt;/a&gt; for Ambiq&amp;rsquo;s headquarters due to lower operating costs and a rich local semiconductor talent pool, while Chris mentions working in &lt;a href="https://theamphour.com/topics/samsung/"&gt;Samsung&lt;/a&gt;&amp;rsquo;s Austin fab from 2006 to 2008. (00:15:45)&lt;/li&gt;
&lt;li&gt;Scott highlights the vast CAD tooling access (such as &lt;a href="https://www.cadence.com/"&gt;Cadence&lt;/a&gt; tools and secure &lt;a href="https://www.arm.com/"&gt;ARM&lt;/a&gt; IP research rooms) available at universities compared to the steep licensing costs faced by early-stage startups. (00:17:45)&lt;/li&gt;
&lt;li&gt;Scott describes how EDA vendors, ARM licensing fees, and legal counsel absorb early startup funding, and how pitching TSMC required establishing executive-level relationships. (00:19:30)&lt;/li&gt;
&lt;li&gt;Scott details how taking investment from venture firm &lt;a href="https://www.kleinerperkins.com/"&gt;Kleiner Perkins&lt;/a&gt; and chairman Wen-Chi Chen helped Ambiq build a strategic partnership with &lt;a href="https://www.tsmc.com/"&gt;TMMC&lt;/a&gt;. (00:21:45)&lt;/li&gt;
&lt;li&gt;Scott emphasizes that low-power startup tech must still leverage leading-edge fab manufacturing to remain competitive against rival chips. (00:23:45)&lt;/li&gt;
&lt;li&gt;Scott explains the decision to use general-purpose off-the-shelf TSMC transistors to avoid losing wafer yield and foundry capacity allocation. (00:24:45)&lt;/li&gt;
&lt;li&gt;Scott describes collaborating with TSMC to refine SPICE simulation models for ultra-low-voltage regions and adopting Low Voltage Format (LVF) for static timing analysis. (00:26:15)&lt;/li&gt;
&lt;li&gt;Scott emphasizes that sub-threshold design makes circuits exponentially sensitive to temperature, voltage, and process variation, requiring resilient chip architecture. (00:28:45)&lt;/li&gt;
&lt;li&gt;Scott takes a deep dive into transistor physics in weak inversion, explaining how diffusion current functions below threshold gate voltage. (00:31:00)&lt;/li&gt;
&lt;li&gt;Chris proposes a leaky2door frame analogy for sub-threshold leakage control, which Scott confirms accurately illustrates controlling weak conduction trickling under the gate. (00:33:00)&lt;/li&gt;
&lt;li&gt;Scott explains why 200-300 mV offers the optimal energy efficiency trade-off for sub-threshold circuits, while digital logic runs near-threshold to balance performance. (00:34:15)&lt;/li&gt;
&lt;li&gt;Scott details single-die SoC integration, explaining why edge devices like wearables must combine MCU cores, radios, ADCs, GPUs, and power management onto a single chip. (00:38:00)&lt;/li&gt;
&lt;li&gt;Scott outlines how different circuit blocks run at targeted voltage levels—against commercial volume manufacturing. (00:39:45)&lt;/li&gt;
&lt;li&gt;Scott describes managing over 50 unique power domains inside Apollo microprocessors to optimize energy efficiency across operating modes. (00:41:00)&lt;/li&gt;
&lt;li&gt;Chris and Scott discusshow sub-threshold operation shines during low-power sleep states when microcontrollers are waiting between measurement cycles. (00:42:30)&lt;/li&gt;
&lt;li&gt;Scott explains how integrating parallel Neural Processing Units (NPUs) running hundreds of multiply-accumulate (MAC) operations per cycle at 100 MHz on a 12nm node achieves high AI throughput at ultra-low voltage. (00:43:45)&lt;/li&gt;
&lt;li&gt;Scott notes that Moore&amp;rsquo;s law and edge AI workload parallelization are accelerating low-power chip architecture opportunities. (00:45:00)&lt;/li&gt;
&lt;li&gt;Scott outlines Ambiq&amp;rsquo;s broad technology platform, spanning wearables, industrial sensors, smart home devices, utility meters, and medical patches like ECG and EEE monitors. (00:46:00)&lt;/li&gt;
&lt;li&gt;Scott discusses how Ambiq&amp;rsquo;s early Apollo processors gained traction in smartwatches, fitness bands, and smart rings that adopted machine learning for heart rate and sleep monitoring a decade ago. (00:47:30)&lt;/li&gt;
&lt;li&gt;Scott discusses going public via IPO to fund product portfolio expansion and address the challenge of building scalable software, documentation, and customer support. (00:49:15)&lt;/li&gt;
&lt;li&gt;Chris and Scott discusshow chip companies have inherently evolved into software companies, exploring pricing models like higher chip margins versus software licensing and royalties. (00:51:00)&lt;/li&gt;
&lt;li&gt;Scott describes customer edge AI workloads, including industrial vibration anomaly detection, acoustic detection sensors, and conversational voice interfacturing. (00:52:30)&lt;/li&gt;
&lt;li&gt;Scott highlights the organizational friction between data science teams training models in ivory towers and firmware teams trying to execute them on hardware, emphasizing the need for simulator and profiling tools. (00:55:00)&lt;/li&gt;
&lt;li&gt;Chris and Scott discuss wireless connectivity options like Bluetooth LE, 802.15.4 (Thread), Wi-Fi, and cellular modems placed alongside the host processor, and Scott&amp;rsquo;s vision to apply SPOT low-voltage tech to radios. (00:57:30)&lt;/li&gt;
&lt;li&gt;Scott addresses &lt;a href="https://theamphour.com/653-benjamin-cabe-nose-zephyr/"&gt;Zephyr RTOS&lt;/a&gt; support, explaining how customer demand has made Zephyr integration a high priority for Ambiq&amp;rsquo;s SDK roadmap alongside hardware abstraction layers (HAL), board support packages (BSP), and FreeRTOS. (01:08:00)&lt;/li&gt;
&lt;li&gt;Scott reflects on startup customer dynamics, explaining how early customization for anchor clients eventually evolves into standardized platforms serving thousands of customers. (01:09:45)&lt;/li&gt;
&lt;li&gt;Scott introduces Ambiq&amp;rsquo;s CompressionKit, a software development kit enabling neural codecs for AI-driven data compression and decompression. (01:11:15)&lt;/li&gt;
&lt;li&gt;Scott explains how neural codecs adaptively compress sensor streams (audio, IMU, biometrics) by 10x to 16x, drastically reducing radio transmission power and memory storage requirements. (01:13:30)&lt;/li&gt;
&lt;li&gt;Scott clarifies how acoustic detection sensors use low-power local classifiers to trigger audio buffer recording and neural codec compression for cloud verification. (01:15:30)&lt;/li&gt;
&lt;li&gt;Scott and Chris examine event lifeloging on wearables (such as siren or speech event detection) and discuss the privacy advantages of local edge AI processing compared to cloud server processing. (01:17:15)&lt;/li&gt;
&lt;li&gt;Scott advises prospective developers to start with Ambiq evaluation kits, sensor modules, and AI coding agents to accelerate embedded C code development. (01:19:00)&lt;/li&gt;
&lt;li&gt;Scott pitches the flagship &lt;a href="https://ambiq.com/"&gt;Apollo 510&lt;/a&gt; processor—featuring an &lt;a href="https://developer.arm.com/Processors/Cortex-M55"&gt;ARM Cortex-M55&lt;/a&gt; core with Helium vector extensions, GPU, 7-8MB memory, and 250 MHz clock speed—alon`side the Apollo 5 Lite and Apollo 330. (01:21:30)&lt;/li&gt;
&lt;li&gt;Scott reveals Ambiq&amp;rsquo;s upcoming 12nm &amp;ldquo;Atomiq&amp;rdquo; processor, equipped with a high-performance NPU and expanded memory for large edge AI models. (01:23:45)&lt;/li&gt;
&lt;li&gt;Scott mentions Ambiq&amp;rsquo;s presence at upcoming events like CES and invites engineers to apply for open positions across AI, chip design, firmware, test, and sales on the &lt;a href="https://ambiq.com/careers/"&gt;Ambiq Careers&lt;/a&gt; page. (01:25:15)&lt;/li&gt;
&lt;/ul&gt;</description></item></channel></rss>