#395 – An Interview with Luke Valenty

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• Luke just got back from Maker Faire Bay Area
  • 0h 0m 48s
• Arduino FPGA board
  • 0h 1m 4s
• Want lots of serial ports
  • 0h 2m 59s
• Porting sketches from one micro to another
  • 0h 6m 30s
• FPGAwars
  • 0h 9m 41s
• Remake of Pong
  • 0h 10m 35s
• Need tools for things to be simpler
  • 0h 11m 22s
• Tim Mithro Ansell
  • 0h 11m 43s
• Clifford Wolf who started project ICEstorm
  • 0h 11m 51s
• FPGAwars hashtag
  • 0h 13m 0s
• APio for building FPGAs
  • 0h 13m 13s
• Obijuan Academy
  • 0h 13m 54s
• Learning Verilog
  • 0h 14m 44s
• Data pipeline vs State machines and control
  • 0h 16m 24s
• Similar to an “if” statement on a micro
  • 0h 16m 51s
• Faster to write imperative code
  • 0h 17m 14s
• Serial port example
  • 0h 18m 3s
• Low power FPGA collects data, wakes up the micro and then transmits
  • 0h 19m 24s
• “You’re not writing code any more, you’re describing hardware”
  • 0h 22m 6s
• Wants to be able to take code and then sythesis in logic
  • 0h 23m 43s
• Why is FPGA needed in a world of cheap micros
  • 0h 26m 58s
• Amazing $1 microcontroller
  • 0h 27m 27s
• When should people switch to an FPGA
  • Customized peripherals
  • Being sure of the hardware that’s going into micr
  • FGPAs have room for change in the future (Especially if you think the protocol will change in the future)
  • 0h 29m 54s
• Chris has experienced this with a video recorder that sells digital upgrades.
  • 0h 33m 1s
• Also useful in test jigs to emulate hardware
  • 0h 33m 6s
• Explaining the hardware
  • 0h 35m 40s
• A series is 1.2×0.7
  • 0h 36m 32s
• Same size as Teensy
  • 0h 36m 59s
• Doesn’t have the end pins like the Teensy
  • 0h 39m 0s
• Buy the boards on Tindie
  • 0h 39m 44s
• Difference between a and b series
  • 0h 40m 57s
• Bugblat tif
  • 0h 41m 7s
• Learned surface mount soldering
  • 0h 44m 11s
• Can find purchaseable boards and more on TinyFPGA.com
  • 0h 45m 54s
• Lattice Mach XO2
• CPLD replacement
  • 0h 46m 31s
• No DSP blocks
  • 0h 46m 39s
• Might be able to fit a micro in A2
  • 0h 47m 23s
• A2 has a hard SPI block
  • 0h 47m 52s
• Put store up on tindie for A1
  • 0h 48m 58s
• Digilent clint cole
  • 0h 49m 35s
• Having a board on the shelf could help for projects/hackathons/when in a bind
  • 0h 51m 22s
• There used to be a B2
  • 0h 52m 50s
• USB connector is SMT
  • 0h 53m 57s
• BX board is 4 layer with BGA ICE40 81 ball 0.4 pitch
  • 0h 54m 49s
• Package is meant to be used in a high density interconnect
  • 0h 55m 41s
• B2 pins are mostly IO
  • 0h 56m 34s
• Leaves some pins tri-stated and breaks out the deep hard IP blocks
  • 0h 57m 22s
• Using PCBway with 4/4 process, via is 0.2 mm
  • 0h 59m 49s
• Wanted more IO for the Bx boards
  • 1h 1m 16s
• Squished pads narrower and elongated them
  • 1h 1m 26s
• Everything is on github 
  • 1h 1m 53s
• Choose your side t-shirt
  • 1h 3m 23s
• Re-using pins like the SPI flash
  • 1h 5m 4s
• Once config is complete, the SPI is handed over to the user design
  • 1h 6m 12s
• Recommends moving to a larger package
  • 1h 7m 30s
• Decided not to do castellation
  • 1h 9m 12s
• B series guide
  • 1h 9m 54s
• BX has a different pin constraint file
  • 1h 10m 46s
• Recommends using APio on commandline
  • 1h 11m 9s
• IDE using Atom with APio plugin
  • 1h 11m 18s
• Using IceCube2 toolchain
  • 1h 12m 4s
• APio supports mostly pin constraints
  • 1h 15m 17s
• Symbiflow is the next gen of opensource tools
  • 1h 16m 0s
• FPGA_dave
  • 1h 16m 56s
• ECP5 will be the next FPGA
  • 1h 17m 32s
• Wants to use SERDES
  • 1h 17m 47s
• Targeting crowdfunding campaign in fall
  • 1h 20m 1s
• Currently have to preorder the BX, due in July
  • 1h 20m 13s
• B series has an USB in the FPGA fabric
  • 1h 22m 20s
• Gets enumerated as a serial port
  • 1h 23m 6s
• Users can pull in the USB device to their projects
  • 1h 25m 0s
• Can store metadata in the spi flash that talks to the programmer
  • 1h 25m 38s
• Like a map file + UID
  • 1h 26m 1s
• Dave Vandenbout XESS
  • 1h 27m 35s
• Professor in Egypt doing FPGA online compiler
  • 1h 29m 36s
• SDR radio people
  • 1h 31m 6s
• Hackaday Supercoference
  • 1h 33m 14s
• Ordered 1250 boards, 600 ordered
  • 1h 36m 14s
• TinyFPGA on Twitter, GitHub, Tindie. Luke is on Hackaday as lukevalenty
  • 1h 36m 30s