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Welcome back James Adams and Liam Fraser
- The RP1 is the new custom silicon on the Raspberry Pi 5 that is the helper chip to the Broadcom part onboard
- The HW team was last on the show in 2021 talking about the RP2040
- They have been working on the RP1 since 2015
- It’s a small team, especially compared to other companies doing custom silicon.
- RP2040 update
- Scripting to reconfigure the silicon clocks/blocks
- Are they making other chips?
- Divvy-ing up duties for silicon
- Broadcom is making the processor and took input for this latest
- Dialog/Renesas do the power chip on the RPi5
- PIO
- Chris gave an example of a board (the Ostentus) where the PIO is just listening for i2c messages and passing them up the stack.
- Design goal was to do cycle by cycle processing
- Someone on twitter having PIO talking to fiber transceivers
- Sourcing and RP2040 availability
- They get 20000 chips per wafer
- Buying wafers a few at a time through IMEC, sometimes through TSMC directly
- There are often small amounts of availability of “wafer starts”
- TSMC40
- IP block updates: USB 3 / Ethernet
- Can do diffs on the verilog
- Receiving high paid IP
- Liam is the sysadmin / servers are on site
- Buying from Synopsis
- Stitching together IP
- They list what version of the IP they’re using in the various sections of the datasheet.
- Prototyping on FPGAs
- Controller and Phy interface are exposed
- ProFPGA system with daughtercards
- Can’t run at full clock speed on FPGA
- Digital vs analog simulation
- Could someone (competitors) copy things?
- As open as possible, being open where it provides value
- Cost savings on the RP2040
- Traditionally the “Southbridge” is the IO hub for computing, the Northbridge was the cache/memory (later subsumed into large CPUs)
- 2712 on RPi is 16 nm
- This model of creating different generations of silicon but putting them all together is similar to chiplets but…on a PCB
- There is a (hidden-ish) PIO in the RP1.
- There will be more processing delays in RPI5 to deal with, but they won’t be noticable because Linux is already pretty not-real-time
- Hoovering up more functions in one chip
- Layout of connectors changed again
- Pins are created to be well laid out on the PCB
- RISC V foundation
- The stack / ecosystem isnt as mature
- James’ signature is under the USB3 connector
- RPi5 is “the most raspberry pi raspberry pi” yet